Project Information per year
2012 - 2011 - 2010 - 2009 - 2008 - 2007 - 2006 - 2005 - 2004

PROJECT II.1 and III.1
NANOSTRUCTURES FOR NANOELECTRONICS, PHOTONICS AND
SENSORS

Project leader:  A. G. Nassiopoulou
Other key researchers:  H. Contopanagos, S. Gardelis, M. Huffman and N. Papanikolaou
Post-doctoral: M. Theodoropoulou
Phd students: V. Gianneta, F. Zacharatos, A. Petropoulos, M. Kokonou, E. Almpanis
Collaborations: I. Tsiaoussis, N. Lioutas and N. Frangis (University of Thessaloniki), A. Othonos (University of Cyprus), S. Kennou (University of Patras, Chemical Engineering Department), S. Georga and C. A. Krontiras (Univeristy of Patras, Physics Department), M. Fakis, P. Persefonis and V. Giannetas (University of Patras, Physics Department), M. A. Reading and J. A. Van Den Berg (University of Salford, UK), S. Jaziri (Faculté des Sciences de Bizerte, Tunisie), I. Kleps (IMT-Bucharest, Romania), C. Terkezis, G. Gantzounis and N. Stefanou ( University of Athens)

Funding:

Research orientation:

a) Nanostructure growth, characterization and applications
The activity on semiconductor nanostructures started at IMEL at the early nineties and it was conducted within different EU projects, in collaboration with other European groups (Esprit-EOLIS, contract No 7228 (1992-95) Esprit FET SMILE contract No 28741 (1998-2000), IST FORUM FIB contract No 29573 (2001-2004), IST-FP6 NoE SINANO contract No 506844 etc). Worldwide original results were produced, including fabrication of light emitting silicon nanopillars by lithography and anisotropic etching and investigation of their optical and electrical properties, growth of Si nanocrystal superlattices by LPCVD and high temperature oxidation/annealing, with interesting optical properties, fabrication and characterization of LEDs based on Si nanopillars and nanodots, fabrication of Si and Ge nanocrystals embedded in SiO2 and fabrication and investigation of the corresponding memory structure.
The present focus of research is on self-assembly and ordering of nanostructures and their different applications in nanoelectronics, photonics and sensors. Porous alumina template and masking technology are also developed. Porous alumina ultra-thin films are grown on silicon by electrochemistry. By appropriately choosing the electrochemical conditions used, pore size and density are monitored. Through-pore silicon nanostucturing follows the pore size and density. Arrays of SiO2 nanodots on Si are fabricated and characterized. Dot size varies from few nm up to few hundreds of nm.
Another technology under development is the growth of ultra thin porous silicon films by electrochemical dissolution of silicon in the transition regime between porosification and electropolishing. Under appropriate conditions, the obtained films are amorphous with embedded Si nanocrystals of various sizes. Under other conditions, the films are nanocrystalline. Their properties are investigated in view of different applications in nanoelectronics and photovoltaics.
The theoretical group focuses on the investigation of ballistic transport in nanostructures, surface plasmons in thin metallic films, classical molecular dynamics and nanoscale heat transport.

b) Porous silicon technology for sensors
An important effort has been devoted the last years within the group in developing materials and enabling technologies for application in sensors. One such material platform with important potential for applications in different sensor devices, microfluidics, lab-on-chip, integration of passives on silicon etc, is porous silicon technology.
Either mesoporous or nanoporous/macroporous silicon are grown. Mesoporous silicon is nanostructured and appropriate for use as micro-plate for local thermal or electrical (dc, RF) isolation on a silicon substrate. Nanoporous Si is also used in the above, after further treatment. Macroporous silicon is developed for use in via technology, in device cooling and in particle filtering.
Different technologies based on porous silicon are available at IMEL, including:

c) RF isolation by porous silicon micro-plates on a silicon substrate
The overall objective of this research is:

• to explore and extend porous silicon technology into the domain of CMOS-compatible integrated RF components and
• to improve the performance of currently integrated analog CMOS components by above technology, and related optimization of design methodologies.

 

Click here to view details from annual report 2008