Project leader:  A. G. Nassiopoulou

Permanent Researcher:  S. Gardelis

Post-doctoral Scientists: : E. Hourdakis, V. Gianneta, A. Sotiropoulos

Phd students: P. Manoussiadis, P. Sarafis, I. Leontis, K. Valalaki

OBJECTIVES

The activities of the group focus in the following:

a) Si nanowires and nanocrystals
Historically the activity on semiconductor nanostructures started within this research group at the early nineties and is conducted within different EU projects. Worldwide pioneering results of the group in this field include the following: The group was the first to report on the fabrication and light emitting properties of Si nanowires (APL 66(9), 1114 (1995)), and on an electroluminescent device based on vertical Si nanowires (APL 69(15), 2267 (1996)). The growth of single and multilayered two-dimensional arrays of Si nanocrystals (NCs) with controllable size embedded in SiO2 was also reported in the nineties, Si NC memories with good characteristics using LPCVD Si nanocrystal were also developed.
In 2012 the group focused on the following:

• Synthesis, characterization and applications of SiNWs by metal-assisted chemical etching:
• Fabrication and properties of two-dimensional arrays of Si nanocrystals embedded in SiO2 for solar cell applications

b) Porous Si
The group has important expertise and know-how in porous Si formation, properties and applications. Highly porous Si is a nanostructured material composed of interconnected nanowires and nanocrystals. Due to its structure and morphology, porous Si has interesting properties, including its very low thermal conductivity and its tunable dielectric permittivity. Based on the above properties, it finds important applications in thermal isolation and in RF shielding on the Si wafer. Pioneering results of the group over the years using porous Si include the development of efficient porous Si micro-hotplate technology on the Si wafer, a low power Si flow sensor, a flow meter for the car engine and a system for respiration control using the low power flow sensor. Developed processes include the local formation of porous Si thick films formed locally on the Si wafer, porous Si free standing close-type membranes over cavity fabricated in a single electrochemical process and porous Si cantilevers and suspended membranes fabricated by electrochemistry.
In 2012 the group focused on the development of porous Si as an RF substrate material and as a substrate material for cooling and heating devices. Its dielectric permittivity was investigated as a function of material porosity, structure and morphology for the frequency range 0-210 GHz. Its thermal properties were also investigated at both room and low temperatures down to 20K for cryogenic applications.   Finally, the growth of metal nanoparticles and nanowires within the pores of the porous Si material is being studied.

c) Porous anodic alumina thin films on Si
The formation, properties and applications of porous anodic alumina thin films on Si are investigated. Highly ordered hexagonal pore arrangement is achieved by electrochemical oxidation of Al films on Si. The applications developed include the formation of nanowires within and the use of porous alumina films on Si as a masking material for Si nano-patterning. Porous anodic alumina has been also investigated as a high-k dielectric material in memory devices and in metal-oxide-metal (MIM) capacitors.

Key results in 2012

• Porous Si thermal conductivity was determined in a wide temperature range of 20–350K. Porous Si shows a much lower thermal conductivity than bulk crystalline Si, this difference exceeding four orders of magnitude at temperatures below 50K.
• The dielectric properties of porous Si for its use as a local RF substrate on the Si wafer were investigated in detail. Co-planar waveguides and inductors were fabricated on local porous Si areas on the Si wafer and tested at radiofrequencies.
• A detailed comparison was made between porous Si as a local RF substrate and the state-of-the-art RF substrate trap-rich high resistivity (HR) Si. The comparison revealed the important advantages of porous Si for this application, compared to the trap-rich HR Si.
• The kinetics of growth of Ni nanoparticles and nanowires into porous Si layers were investigated. The porous Si layers had vertical branched pores of average diameter in the range of 30-45nm. The porous Si layer thickness was in the range of 0.5 to 4 μm. The growth of the Ni nanoparticles and nanowires was achieved using pulsed electrodeposition from a Ni salt solution.
• Si nanopatterning through an on-chip self-assembled porous anodic alumina (PAA) masking layer using reactive ion etching based on fluorine chemistry was investigated. The pattern of the hexagonally arranged pores of the alumina film was perfectly transferred to the Si surface.

Infrastructure Development

The electrochemistry laboratory was fully upgraded in 2012
The sputtering system in the laboratory was upgraded. The following materials are deposited: amorphous Si, SiO2, Al, Cu and Pt.
The optics laboratory for PL, photocurrent and solar cell characterization was also upgraded.

 FUNDING

• EU FP7 ENIAC JU Project SE2A, 1/1/2009-31/03/2012- Contract No 120009
• EU FP7 Network of Excellence NANOFUNCTION, 1/9/2010-31/8/2013 - Contract No 257375
• EU FP7 Coordination and Support Action NANO-TEC, 1/9/2010-28/2/2013 - Contract No 257964